µPD9245GJ
Single Frame Super Resolution LSI
Introduction
The single frame super resolution LSI "µPD9245GJ" realizes image data analysis and processing on a single frame and incorporates NEC Electronics' original single frame super resolution technology, enabling blurred images to be cleaned up easily.
Using standard video interfaces for data input and output, the µPD9245GJ chip can be easily embedded in existing systems and used in a variety of applications that handle images and video.
Features
- Incorporates single frame super resolution IP and interface circuit (*1).
- Maximum video system clock frequency: 108MHz
(e.g.) SXGA (1280 x 1024 pixels) / 60fps (*2)
- Enables real-time processing without an image distortion even if it's just added on to an existing system as is.
- Images can be cleaned up at the lowest possible cost because external memories are not required.
Notes (*)
- Circuit allowing RGB I/O and YUV I/O to be switched. Auto image size acquisition function.
- Supported image size; Maximum pixels = 1,920 pixels (Horizontal)
Specification
- NEC Electronics' original single frame super resolution algorithm
- Supports video (progressive)
- Maximum video system clock frequency: 108MHz
- Image interface: 24-bit CMOS I/O
- I/O can be selected from RGB (RGB888, RGB666) or YUV (YUV444, YUV422)
- External frame memories not required
- Incorporates I²C bus for register setting (100 kbps, 400 kbps both supported)
- Supports JTAG
- Power supply voltage: 3.3 V (I/O), 1.5 V (internal)
- Power consumption: 0.9 W (typ.) (when operating at SXGA/60 fps)
- Package: 144-pin LQFP (20 x 20 mm, 0.5 mm pitch)
- Operating temperature range (TA): -40 to +70°C
Block Diagram
When click "Super resolution processing IP" in a figure; link to IP Core: Introduction to Super-Resolution Technology.
Documentation
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Document Name
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Language
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Document No.
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PDF download
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Single Frame Super Resolution LSI (µPD9425GJ) Pamphlet
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English
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S19516E
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User's Manual
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English
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Please refer to a salesperson
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Inquiry Concerning Single Frame Super Resolution ASSP