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SoC-Friendly Macros
To ensure straightforward physical design of complex SoCs with large eDRAM blocks, the eDRAM macros should provide as much flexibility as possible. Conventional eDRAM does not allow the rotation of eDRAM macros in the same die area. This limitation can make layout difficult in many cases because most ASICs that contain eDRAM use multiple eDRAM instances.
Orientation-Free Embedded DRAM
NEC Electronics is unique in allowing you to rotate eDRAM blocks to any orientation in a chip. This feature offers major advantages in optimizing the chip's floorplan and minimizing die size.
Active Wires Over DRAM
Additionally, you can route the upper metal layers over the top of eDRAM blocks, simplifying chip routing, improving timing, and conserving silicon real estate. Conventional eDRAM macros impose large blockage areas that place-and-route tools must detour around to connect the I/O and core logic areas. Because NEC Electronics eDRAM allows active signals to pass over the macros, the router can take the shortest path between the I/O and core areas. This unique feature helps layout designers maintain signal integrity, optimize critical timing paths and implement high-performance chips.
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