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NEC Electronics' eDRAM offers SRAM-like access that is far faster than competing eDRAM. Moreover, eDRAM provides several advantages over SRAM.
As the area vs. capacity graph shows, SRAM area increases linearly with bit capacity. The eDRAM scales much more slowly after including a one-time area requirement for the charge pump. For the 130 nm generation, the cross-over point between eDRAM and eSRAM area is about 512 Kb. By the 8 Mb level, eDRAM takes less than 1/4 - 1/5 the area of SRAM.
Even more dramatic are eDRAM's advantages relating to power and soft error rate (SER). Because eDRAM consumes far less power than SRAM, using eDRAM may allow you to eliminate package heat sinks and other expensive cooling options, thus reducing overall system cost.
SRAM's soft error rate has become a bigger problem with each shrink in process geometries. For an 8 Mb memory at the 130 nm process node, for example, SRAM exhibits an SER three orders of magnitude higher than that of eDRAM. SRAM's SER becomes even worse at 90 nm and beyond, as the smaller transistors become more susceptible to state changes.
Because eDRAM cells have stable storage capacitor values, eDRAM offers much better SER characteristics than SRAM. Embedded DRAM thus offers an excellent alternative for improving SoC reliability.
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