Please note that JavaScript and style sheet are used in this website,
Due to unadaptability of the style sheet with the browser used in your computer, pages may not look as original.
Even in such a case, however, the contents can be used safely.
55 nm eDRAM Optimizes Both Speed and Power
Enhancements to the NEC Electronics 55nm standard CMOS process (UX7LS) bring significant improvements to embedded DRAM technology. Most notably, the improvements to our UX7LSeD eDRAM include significant power reductions:
- Lower leakage power consumption – A new high-k gate dielectric dramatically reduces leakage current, eliminating the need to choose between high speed and low leakage.
- Lower dynamic power consumption – The new dielectric enables use of lower operating voltages, thus reducing active power consumption.
The process improves eDRAM
The high-speed, low-power advantages of NEC Electronics' unique thin-hafnium-silicate-film transistors improve the performance of every eDRAM cell, as well as associated circuitry such as the sense amplifiers. As with any transistor fabricated in our 55nm process, the transistor in each eDRAM cell gains a higher on-current through the use of the hafnium silicate dielectric, which also reduces the leakage currents. The high-k DRAM cell reduces Vt shift against substrate bias (Vsub) fluctuation because of low channel doping. Vt variability and mismatches are also reduced. These changes bring better eDRAM performance as well as improving retention yield.
TEM image of 55-nm high-k dielectric transistor structure
The eDRAM cell uses a lower operating voltage (from 2.5 to 1.8V for the 90 and 55nm nodes, respectively). The lower voltage reduces active power consumption as well as the area required by macros.
The capacitor in the eDRAM cell uses a different dielectric – zirconium dioxide. Pioneered by NEC Electronics, this material has proven highly successful in our 90 nm process and continues to work well at 55nm. In our unique metal-insulator-metal (MIM2) capacitor structure, the relatively large capacitance achieved by zirconium dioxide provides a high data retention time that eliminates the need for the error-correction codes and thermal sensors used in competing eDRAM technologies.
The speed/power sweet spot
With innovative materials and configurations, eDRAM technology from NEC Electronics offers the high-speed/low-power characteristics that suit a wide range of ASIC applications. In generation after generation, our eDRAM technology has led the industry in providing the fastest access times with reliable technology that preserves the full performance of CMOS logic. The 55nm generation continues that high standard.
|
|