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DDRII SRAM 18M bit

(Operating ambient temperature: Commercial TA=0 to +70°C),
(Operating ambient temperature: Industrial TA= -40 to +85°C)


18M bits (2M words x 8 bits organization)

Part Number*1 Speed
Grade
Clock
Frequency
(MHz)
Supply Voltage
(V)
Package Remark Data
Sheet
0 to
+70°C
-40 to
+85°C
Chip I/O*2
µPD44164082 E40 -- 250 1.8±0.1 1.4 to 1.9 F5-EQ1:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 2
(305KB)
E50 -- 200
E60 -- 167
µPD44164082A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 2
(375KB)
-- E37Y 270
E40 E40Y 250
E50 E50Y 200
µPD44164084 E40 -- 250 1.8±0.1 1.4 to 1.9 F5-EQ1:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 4
(308KB)
E50 -- 200
E60 -- 167
µPD44164084A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 4
(379KB)
-- E37Y 270
E40 E40Y 250
E50 E50Y 200
µPD44164085 E40 -- 250 1.8±0.1 1.4 to 1.9 F5-EQ1:
165-pin BGA
(13x15mm)
Separate I/O,
Burst Length
of 2
(311KB)
E50 -- 200
E60 -- 167
µPD44164085A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Separate I/O,
Burst Length
of 2
(383KB)
-- E37Y 270
E40 E40Y 250
E50 E50Y 200


Note(*)

  1. µPD44164xx2A, µPD44164xx4A and µPD44164xx5A are upward compatible with µPD44164xx2, µPD44164xx4 and µPD44164xx5, respectively.
    µPD44164xx2A, µPD44164xx4A and µPD44164xx5A are recommended for new designs. These products are planned to be consolidated to µPD44164xx2A, µPD44164xx4A and µPD44164xx5A.
  2. During normal operation, the supply voltage of I/O must not exceed that of Chip.


18M bits (2M words x 9 bits organization)

Part Number Speed
Grade
Clock
Frequency
(MHz)
Supply Voltage
(V)
Package Remark Data
Sheet
0 to
+70°C
-40 to
+85°C
Chip I/O*1
µPD44164092A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 2
(375KB)
-- E37Y 270
E40 E40Y 250
E50 E50Y 200
µPD44164094A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 4
(379KB)
-- E37Y 250
E40 E40Y 250
E50 E50Y 200
µPD44164095A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Separate I/O,
Burst Length
of 2
(383KB)
-- E37Y 250
E40 E40Y 250
E50 E50Y 200


Note(*)

  1. During normal operation, the supply voltage of I/O must not exceed that of Chip.


18M bits (1M words x 18 bits organization)

Part Number*1 Speed
Grade
Clock
Frequency
(MHz)
Supply Voltage
(V)
Package Remark Data
Sheet
0 to
+70°C
-40 to
+85°C
Chip I/O*2
µPD44164182 E40 -- 250 1.8±0.1 1.4 to 1.9 F5-EQ1:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 2
(305KB)
E50 -- 200
E60 -- 167
µPD44164182A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 2
(375KB)
E37 E37Y 270
E40 E40Y 250
E50 E50Y 200
µPD44164184 E40 -- 250 1.8±0.1 1.4 to 1.9 F5-EQ1:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 4
(308KB)
E50 -- 200
E60 -- 167
µPD44164184A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 4
(379KB)
-- E37Y 270
E40 E40Y 250
E50 E50Y 200
µPD44164185 E40 -- 250 1.8±0.1 1.4 to 1.9 F5-EQ1:
165-pin BGA
(13x15mm)
Separate I/O,
Burst Length
of 2
(311KB)
E50 -- 200
E60 -- 167
µPD44164185A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Separate I/O,
Burst Length
of 2
(383KB)
E37 E37Y 250
E40 E40Y 250
E50 E50Y 200


Note(*)

  1. µPD44164xx2A, µPD44164xx4A and µPD44164xx5A are upward compatible with µPD44164xx2, µPD44164xx4 and µPD44164xx5, respectively.
    µPD44164xx2A, µPD44164xx4A and µPD44164xx5A are recommended for new designs. These products are planned to be consolidated to µPD44164xx2A, µPD44164xx4A and µPD44164xx5A.
  2. During normal operation, the supply voltage of I/O must not exceed that of Chip.


18M bits (512K words x 36 bits organization)

Part Number*1 Speed
Grade
Clock
Frequency
(MHz)
Supply Voltage
(V)
Package Remark Data
Sheet
0 to
+70°C
-40 to
+85°C
Chip I/O*2
µPD44164362 E50 -- 200 1.8±0.1 1.4 to 1.9 F5-EQ1:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 2
(305KB)
E60 -- 167
µPD44164362A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 2
(375KB)
E40 -- 250
E50 -- 200
µPD44164364 E50 -- 200 1.8±0.1 1.4 to 1.9 F5-EQ1:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 4
(308KB)
E60 -- 167
µPD44164364A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Common I/O,
Burst Length
of 4
(379KB)
E40 -- 250
E50 -- 200
µPD44164365 E50 -- 200 1.8±0.1 1.4 to 1.9 F5-EQ1:
165-pin BGA
(13x15mm)
Separate I/O,
Burst Length
of 2
(311KB)
E60 -- 167
µPD44164365A E33 -- 300 1.8±0.1 1.4 to 1.9 F5-EQ2:
165-pin BGA
(13x15mm)
Separate I/O,
Burst Length
of 2
(383KB)
E40 -- 250
E50 -- 200


Note(*)

  1. µPD44164xx2A, µPD44164xx4A and µPD44164xx5A are upward compatible with µPD44164xx2, µPD44164xx4 and µPD44164xx5, respectively.
    µPD44164xx2A, µPD44164xx4A and µPD44164xx5A are recommended for new designs. These products are planned to be consolidated to µPD44164xx2A, µPD44164xx4A and µPD44164xx5A.
  2. During normal operation, the supply voltage of I/O must not exceed that of Chip.


 
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