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U.S. Wafer Foundry
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CMOS35
UC-1H (CB-9VX)

CMOS25
UC-2 (CB-10VX)

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(12/2006) (278 KB)

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UC-1H 0.35 µm CMOS (4Al)

Process Features

Twin Well CMOS
LOCOS Isolation
Gate Oxide 85 A
Gate: 0.36 µm (width) 0.78 µm (pitch)
Contact Diameter: 0.48 µm
3 to 4 Al capability
1 Al: 0.60 µm (width) 1.12 µm (pitch)
2-3 Al: 0.72 µm (width) 1.32 µm (pitch)
4 Al: 1.0 µm (width) 2.0 µm (pitch)

Device Features

Supply Voltage: 3.3 0.3 V (Normal Transistor)
Supply Voltage: 5.0 0.5 V (Multi Oxide Transistor)
Min. Transistor Width: 0.9 um
Min. Transistor Pitch: 1.36 um (Min. Gate Pitch w/ Contact)

CMOS Electrical Parameters

NMOS Device:	Target	Min	Max	Units
BVDSN (50/0.36 @1µA Vgs = 0)		7		V
Vtn (50/0.36 @ Ids=1µA & Vds=3.3V)	0.55	0.4	0.7	V
Ionn (50/0.36 @Vds=Vgs=3.3V)	22	19	26	mA
PMOS Device:	Target	Min	Max	Units
BVDSP (Vgs = 0)			-7	V
Vtp (50/0.36 @ Ids =-1.0 µA & Vds=-3.3V)	-0.6	-0.7	-0.45	V
Ionp (50/0.36 @Vds=Vgs=-3.3V)	-10.5	-13.5	-9	mA

Questions? Contact our foundry team.