Beginning of this page
Jump to main content

Please note that JavaScript and style sheet are used in this website,
Due to unadaptability of the style sheet with the browser used in your computer, pages may not look as original.
Even in such a case, however, the contents can be used safely.

Products > Digital AV LSI > MPEG Decoder for Digital TV >

EMMA2TH/H (µPD61164)

Digital Full Hi-Vision TV System LSI


Overview Target System Product Specification Block Diagram Product Lineup

Overview

EMMA2TH/H (µPD61164) is HDTV processor corresponding to digital analog broadcasting method in each country.
It include into single-chip necessary functions for Full HD TV such as CPU,Audio & Video signalprocessing, panel signal processing,and peripheral control functions.
EMMA2TH/H (µPD61164) is optimum LSI solution to make up Full HD TV.


Target System

  • Digital TVs supporting BS/CS/terrestrial digital broadcasting

Product Specification

Product Specification
On-chip CPU
  • Five-CPU architecture of NEC Electronics VR5500 core, MIPS32® 4KEc® core, and three MIPS32® 4KEm® cores
    • Main CPU: NEC Electronics VR5500 core
      • 654MIPS@327MHz
    • Sub CPU: MIPS32® 4KEc® core
      • 300DMIPS@196MHz
    • 2 audio CPUs: MIPS32® 4KEm® core
      • 400DMIPS@262MHz
    • Extended CPU: MIPS32® 4KEm® core
      • 205DMIPS@131MHz
Memory Interface
  • DDR2 memory interface
    • Supports up to 256 MB
    • Band width: 3.9 GB/s
  • Flash ROM interface
    • Supports up to 64 MB
    • Supports 8-/16-bit bus width
MPEG Transport Stream Processing Engine
  • Hardware processing architecture
  • Stream I/Fs: Four inputs out of one parallel input, six serial inputs, and one playback input
  • Supports MPEG-compliant transport streaming
  • Maximum transport stream processing rate: 210 Mbps total (four inputs)
  • 160-section filter
MPEG Video Decoder
  • MPEG2 MP@HL
Audio Processor
  • Supports MPEG1/MPEG2 layer 1/2
  • Supports MPEG2 AAC
  • Supports SPDIF output
Graphics Display
  • Motion-adaptive de-interlacer supporting full HD
  • 7x5-tap high-performance video scaler
  • Supports five ARIB planes
Picture Quality Controller
  • Picture quality controller supporting 14-bit signal processing xvYCC
  • Y and C histogram detection
  • Programmable gamma controll
  • Color characteristics correction
  • 3D noise reduction
Peripherals
  • UART ×4
  • SmartCard I/F ×1
  • I2C x3
  • Clocked Serial I/F
  • IR receiver/blaster
  • Two system timers
    • WDT
    • RTC
PCI Interface
  • PCI Rev2.1
  • Clock frequency: 33 MHz, bus width: 32 bits
  • Operates as PCI host or PCI device
Digital Video Output
  • Main
    • LVDS Dual Link
  • Sub
    • ITU-R BT.656



Block Diagram

Block Diagram


Product Lineup

T.B.D



This device is protected by U.S. patent numbers 5,583,936; 6,516,132; 6,836,549; and 7,050,698, and other intellectual property rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay-per-view uses only, unless otherwise authorized in writing by Macrovision. Reverse engineering or disassembly is prohibited. Macrovision-capable devices may only be sold to Macrovision Authorized Buyers.
This device is protected by U.S. patent numbers 6,600,873 and other intellectual property rights.


Contact for Product



Related Information


 
Click here to rate this page