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EMMA2SW (µPD61125)

High Performance MPEG Decoder LSI for digital Set Top Box and digital Television market with enhanced security



Overview

The cost-effective and high-performance EMMA2SW (µPD61125) MPEG decoder is targeted to mid-end digital STBs and iDTVs requiring dual decoding functionality in satellite, cable, terrestrial and DSL applications. Additional features include

- Dual video and audio decoding for simultaneously displaying two different TV channels from one or two separate tuners onto two TV sets.
- Connectivity expansion via PCI bus, making the implementation of additional functionalities, including DOCSIS STBs, possible.


Target System

  • Dual-view STBs

Product Specification

Product Specification
Integrated High Performance CPU
  • MIPS32® 4KE® Core x 2
  • Main CPU: for Application, RTOS, API, BIOS
    • 286 MIPS at 187 MHz
    • MIPS32® instruction
    • Cache size : I-Cache 8 Kbytes, D-Cache 8 Kbytes (Cache accessing for 2 ways)
  • Sub CPU: for MPEG decoder inside F/W (Audio/Video decode, AV-sync)
    • 286 MIPS at 187 MHz
    • MIPS32® instruction
    • Cache size : I-Cache 8 Kbytes, D-Cache 8 Kbytes, Scratch Pad 16 Kbytes
ROM Interface
  • Supports NOR, NAND type
  • Supports 64 Mbytes space for ROM area
  • 4-chip select signals (Maximum)
  • 4M/8M/16M/32M/64M modes for each chip select
  • 16 bits and 8 bits bus width support
SDRAM Interface
  • Following DDR/SDR SDRAM support
    • 128/256/512 Mbits /1 Gbit x 16
    • 16 Mbytes - 128 Mbytes memory area support
  • 16-bit bus width
  • 1-chip select signal
  • 166 MHz frequency
General I/O Interface
  • Supports Motorola and Intel mode
  • 8-bit/16-bit bus width
  • 4-chip select (maximum) signal
MPEG Stream Processor
  • NEC Electronics original processor core for software architecture
  • MPEG2-TS Support
  • 36 PID (include Video PID x 1, Audio PID x 2, PCR PID x 2)
  • 32 Section Filter with 8-byte/16-byte depth x 2
  • HSD output (Filtered TS, De-scrambled TS)
  • DVB de-scrambler supported
MPEG Video Decoder
  • MPEG2 MP at ML x 2 decoding support
  • MPEG2/1 elementary stream accepts
  • I-flame still video decoding support
Audio Decoder
  • MIPS32® 4KE® core : 286 MIPS at 187 MHz
  • MPEG1/MPEG2 layer 1, 2 dual decoding support
  • Dolby® Digital 5.1-ch down-mix decoding support
  • Test tone generator
  • S/PDIF (IEC60958) output
  • PCM (L/R) output (x 2) and input (x 1)
Display
  • 5 Graphics Plane Support
    • Background plane
    • Live Video plane for MPEG video (4:2.0, 4:2:2)
    • Still plane (4:2:0, 4:2:2)
    • 2 OSD planes (1, 2, 4, 8 bpp and 12, 15, 16, 32 RGB)
  • OSD support various RGB format
    • RGB12 alpha:R:G:B = 4:4:4:4
    • RGB15 alpha:R:G:B = 1:5:5:5
    • RGB16 R:G:B = 5:6:5
    • RGB32 alpha:R:G:B = 8:8:8:8
  • 256 level alpha blending between 5 planes
  • Real Time Scaling for Live Video and Still planes
    • x 1/4 to x 4 for both H (7-Tap) and V (3-Tap)
  • Transparent Color in RGB mode supports
  • Anti Flicker Filter for OSD (3 taps)
Graphics Engine
  • 2D Bit-BLT engine
  • Color Space conversion
    • 32 RGB to YCbCr4:2:2
    • YCbCr4:4:4 to YCbCr4:2:2
    • YCbCr to RGB
  • Color Expansion
  • Porter-Duff Alpha compositing support
  • X-Y Scaling (a scaling factor of 0.5x to 2x)
  • Off line Anti Flicker Filter for RGB format map
Video Encoder
  • NTSC and PAL (M, N, C) encoder
  • SECAM Encoder
  • Various VBI function support
    • Closed Caption
    • Teletext
    • WSS
    • Video ID
    • VPS
  • 6-DACs for CVBS, Y/C, Y/Cb/Cr video output
  • Macrovision 7.1.L1
  • CCIR-656 digital output
DMA Controller
  • SDRAM to SDRAM transfer
  • Transfer between SDRAM and general I/O interface
Peripherals
  • Standard UART x 2
  • UART (16550 compatible) with 16-byte FIFO x 2
  • Smart Card Interface x 2
  • I2C x 2
  • CSI x 1
  • Programmable IO interface
  • Supports IR Blaster/IR commander
  • Timers
    • Two system, Elapse, Watch Dog Timers
    • Four timers supporting input capture timers and output compare timers
  • PCI Interface
Process
  • 0.15 µm CMOS process
Power Supply Voltage
  • 1.5 V (internal), 2.5 V (DDR SDRAM I/F), 3.3 V (I/O)
Package
  • 345-pin plastic BGA (22 x 22 mm)



Block Diagram

Block Diagram


Product Lineup

T.B.D





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