Beginning of this page
Jump to main content

Please note that JavaScript and style sheet are used in this website,
Due to unadaptability of the style sheet with the browser used in your computer, pages may not look as original.
Even in such a case, however, the contents can be used safely.


EMMA2RL (µPD61181)

1 Chip Solution of MPEG2 Audio & Video Codec LSI



Overview

The EMMA2RL (µPD61181) IC is the industry's first DVD recorder codec to incorporate all of the necessary functions for back-end A/V processing in emerging DVD recorder applications.


Target System

  • DVD/HDD recorders

Product Specification

Product Specification
CPU
  • Main processor
    • MIPS32® CPU core: 225 MIPS(Dhrystone)@187 MHz frequency
    • 32-bit RISC MIPS® architecture (supports MIPS32® instruction set)
    • EJTAG debugging interface
  • Sub CPU
    • MIPS32® CPU core with DSP features for audio processing
Unified memory controller
  • Memory Interface
    • Supprots DDR226,DDR333 SDRAM
  • Memory bus
    • 128/256/512Mb SDRAM(16bit)x2
    • 128/256Mb SDRAM(8bit)x4
External memory interface (EMI)
  • ROM interface
    • Supports NOR, NAND
    • 2 chip select signals
  • General input/output (GIO) interface
    • 4 chip select signals
    • Supports 16/8bit Host bus(Intel/Motorola interface format), 16-bit PC card (PCMCIA) interface
MPEG video encode engine
  • MPEG2 video MP@ML, SP@ML standard and MPEG1 standard
  • Picture size
    • Horizontal
      720/704/640/544/480/352/320
    • Vertical
      480/240 Lines (NTSC), 576/288 Lines (PAL)
  • Single-pass VBR, CBR encode control
  • Supports video 8-bit Y/Cb/Cr 4:2:2 (ITU-R BT.656)
  • Time base corrector
Audio encode engine
  • MPEG1 audio layer 2 standard
  • LPCM for DVD/D-VHS
  • Supports sample rate conversion: 32, 44.1, 48 kHz to 48 kHz
  • Dolby® Digital consumer encode
MPEG stream processor
  • MPEG2-PS, MPEG2-TS and MPEG1-System Supports
  • DVD-Video, DVD-Video recording, DVD-Audio(*1) and VCD
  • Decryption CSS, CPRM, CPPM(*1), DES,DTCP(*1)
  • Encryption CPRM, DES,DTCP(*1)
  • Multiplex support for format conversion
  • Demultiplex support
  • Partial TS generation
  • Stream interfaces
    • Two 8-bit parallel ports
    • Two serial ports
MPEG video decode engine
  • MPEG2 video MP@ML, SP@ML standard and MPEG1 standard
  • JPEG decode accelerator
Audio decode engine
  • Dolby® Digital 5.1 channel decode (family option)
  • MPEG1 audio layer 1/2 standard
  • LPCM for DVD/D-VHS
  • Supports virtual surround
  • Supports Trick Play (1.5 x Playback)
Display/Graphics BitBlt engine
  • 7 graphics planes
    • Background Plane x2
    • Move/Still Video Plane x2 (4:2:0,4:2:2)
    • OSD plane x 2 (2,4,8 bpp,RGB16,32)
    • H/W cursor plane x1 (1,2,4bpp)
  • 256-level alpha blending between all planes
  • Simultaneous interlace and progressive video output
  • 3D Noise reduction filter
  • Flicker Free filter
  • Motion adaptive De-interlacer
  • Sub-Picture decoding
  • Scaling functions (move, still, OSD)
  • Color space conversion function
Video encoder
  • Five 54 MHz 10-bit DACs for analog YPbPr (or YCbCr or RGB), S-Video (Y/C) and CVBS video output
  • NTSC, PAL and SECAM standards
  • Supports Closed Caption, Teletext, WSS, CGMS, Video ID, and VPS
  • Supports picture quality enhancement functions HUE,contrast, gamma control,blightness, etc
  • Macrovision 7.1.L1, Macrovision AGC 1.2
External video port
  • ITU-R BT656 8bit input x1, output x1
  • ITU-R BT1358 16bit output x1
External audio port
  • Input x1(2ch), PCM audio output x3(6ch)
  • IEC60958 (SPDIF) output x1
IDE interface
  • 2IDE I/F supports
  • Supports two IDE interfaces for up to four IDE drives
  • UATA100/66/33, bus master IDE and PIO modes
Video decoder
  • Support Three-dimensional Y/C separation (NTSC-M)
  • Digital chrome decode function (NTSC/PAL/SECAM)
  • 2 channels of 10-bit A/D converters
    • supporting composite and S input
  • IEEE1394 AV Link
  • Stream port x2
  • IEC61883(-1,-2,-3,-4,-5)
    • Support DVCR(SD),MPEG-TS(DVB) format
Peripherals
  • Two 16550 UARTs with 16-byte FIFO
  • Support one clocked serial interface (CSI)
  • Two I2C-compatible multi-master interfaces
  • IR receiver
  • IEEE1284, General purpose I/O
Process
  • 0.15 µm CMOS
Power supply voltage
  • 3.3 V I/O, 2.5 V I/O for DDR SDRAM interface, 1.5 V for core logic
Package
  • 449-pin Plastic BGA ( 27.0 x 27.0 mm )


Note(*)

  1. The product name is different.


Block Diagram

Block Diagram


Product Lineup

T.B.D




This device is protected by U.S. patent numbers 5,583,936; 6,516,132; 6,836,549; and 7,050,698, and other intellectual property rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay-per-view uses only, unless otherwise authorized in writing by Macrovision. Reverse engineering or disassembly is prohibited.
This Device can only be sold or distributed to Authorized Buyers.
This device is protected by U.S. patent numbers 6,600,873 and other intellectual property rights.



Contact for Product



 
Click here to rate this page