ASIC Packaging

Packaging is a crucial element of today's ASIC designs. That's why NEC Electronics offers a broad selection of ball grid array (BGA) packaging solutions that enable designers to meet their custom design requirements while experiencing the following benefits:

• Outstanding electrical performance
• Excellent thermal properties
• Better power distribution
• Smaller footprint and thinner packages
• Lower production costs
• Proven quality and board-level reliability

The portfolio of packaging solutions from NEC Electronics includes the high-performance, high-pin-count advanced BGA (ABGA) and flip-chip BGA (FCBGA) with up to 2800 pins and a 500 MHz operating frequency. For designs where space is a critical factor, chip-scale packages (CSP) and small outline packages like the fine-pitch BGA (FPBGA) offer viable alternatives. If integrating multiple die or multiple packages into a single package is required, then the system-in-package (SIP) option is the ideal solution. For cost-effective performance, NEC Electronics offers tape BGA (TBGA) and plastic BGA (PBGA) packages in a range of pitches and pin counts.

In addition to the BGA package styles, NEC Electronics also supports quad flat package (QFP), small outline package (SOP) and quad flat no-leads (QFN) packages. All packaging solutions are lead-free and environmentally friendly.

Advantages of BGA Packages

ABGA is a surface-mount package with solder balls that form an array on the underside of the package body as the external terminals. BGA packages have finer terminal pitches and are therefore able to accommodate higher pin counts compared to leaded packages. Unlike leaded packages, BGA balls can be in an area array format, thereby optimizing real estate use in circuit boards. BGA packages also typically boast excellent electrical and thermal performance, are suitable for high-frequency applications, have proven reliability, and come with multiple layer substrates.

Specific advantages of the ABGA, FCBGA and SIP packages include excellent design flexibility and the ability to accommodate additional GND and VCC connections for optimum electrical performance. These packages also have the option of enhancing thermal characteristics with a heat spreader directly attached to the backside of the die.

BGA Package Types

Plastic Ball Grid Array (PBGA)

PBGA is a cost/performance package with a wide range of applications limited to the low-end spectrum of BGA packages. The package consists of a plastic substrate with the external BGA balls on one side and a die on the other side connected to the substrate by bonded gold wires. The PBGA package allows flexibility in assigning signal and power/ground balls based on the custom design.

PKG TYPE	PACKAGE SIZE (mm2)	BALL PITCH (mm)	BALL COUNT	DIE SIZE (mm2)	REMARKS
PBGA Outline Thermal Electrical	14x10	1	117	6x5	Flexible to assign signal and power/ ground balls based customer request.
	13	1	144	~6
	14x22	1.27	119	5x9 - 8x13
	17	1	256	~10
	19	1	324	~10
	21	1	256, 272, 292, 320	~12
	22	1	345, 385	~12
	23	1	324, 352, 484	~12
	27	1	385, 400, 432, 449, 544, 676	4.47 - 15.0
	27	1.27	256, 272, 316, 320, 352	4.47 - 15.0
	27	1.5	225	4.47 - 15.0
	35	1	609, 641, 729, 797, 933	6.47 - 17.0
	35	1.27	313, 352, 388, 420, 480, 484, 492, 544, 588	6.47 - 17.0

Tape Ball Grid Array (TBGA)

TBGA packages are assembled from 1-metal-layer polyimide tape, with leads TAB bonded to the die on one side of the tape. A copper heat spreader attached to the backside of the die provides for enhanced thermal characteristics. External terminals (BGA balls) are mounted on the other side of the polyimide tape. While this structure limits the package to a one-to-one I/O connection, it provides for enhancements in both electrical performance (with less discontinuities) and thermal characteristics.

PKG TYPE	PACKAGE SIZE (mm2)	BALL PITCH (mm)	BALL COUNT	DIE SIZE (mm2)	REMARKS
TBGA Outline Thermal Electrical	27	1.27	256	5.5 - 10.4	All custom design.
	35	1.27	352	7.4 - 14.9
	40	1.27	420	8.2 - 14.9
	40	1.27	500	9.6 - 14.9
	40	1.27	576	10.4 - 14.0
	40	1	696	13.1 - 14.9

Advanced Ball Grid Array

Advanced BGAs are PBGA packages that have been thermally and electrically enhanced. This is accomplished by mounting the chip face down on the substrate and attaching a heat spreader on its backside. As in the PBGA, the advanced BGA uses plastic substrates but with multiple layers.

PKG TYPE	PACKAGE SIZE (mm2)	BALL PITCH (mm)	BALL COUNT	DIE SIZE (mm2)	REMARKS
ABGA Outline Thermal Electrical	27	1.27	256	4.8 - 7.7	All custom design.
	35	1.27	352	5.3 - 12.98
	35	1.27	420	7.22 - 10.58
	40	1.27	500	7.5 - 12.6
	40	1.27	576	9.14 - 11.54
	45	1.27	756	11.54 - 17.5

Flip-Chip Ball Grid Array

The FCBGA is a BGA package that bridges the gap between flip-chip and surface-mount technology using a combination of flip-chip and BGA structures. Compared to other BGA types, FCBGA maximizes package ball count without increasing the device size. The flip-chip interconnect enables short electrical paths for high-frequency applications, thereby enhancing the electrical characteristics of the package. The interconnecct also accommodates a heat spreader that can be attached to the backside of the die, resulting in excellent thermal performance. These characteristics, in addition to design flexibility, make the FCBGA the best candidate for high-end applications

PKG TYPE	PACKAGE SIZE (mm2)	BALL PITCH (mm)	BALL COUNT	DIE SIZE (mm2)	REMARKS
FCBGA Outline Thermal Electrical	21	1	360	~11	All custom design but there is high flexibility to meet Pin assignment requests from customers.
	33	1.27	624	~14
	24.5X19.5	0.8	655	~10
	27	1	625	~11
	29	1	729	~14
	29	1	784	~14
	33x42.5	1.27	824	~14
	40	1.27	899	~15
	33	1	955	~14
	42.5	1.27	1088	~15
	35	1	1155	~15
	37.5	1	1296	~15
	40	1	1521	~15
	45	1	1849	~17
	50	1	2209	~21
	55	1	2809	~21

Fine-Pitch Ball Grid Array

The FPBGA package is a derivative of the PBGA package with a plastic substrate, although it flaunts a much finer BGA ball pitch, under 0.8 mm, for miniaturization. A fine-pitch version of the TBGA also exists and is known as the tape fine-pitch ball grid array (TFPBGA). This package uses the same laminate tape as the TBGA, but offers BGA pitch under 0.8 mm for miniaturization.

PKG TYPE	PACKAGE SIZE (mm2)	BALL PITCH (mm)	BALL COUNT	DIE SIZE (mm2)	REMARKS
FPBGA Outline Thermal Electrical	6	0.65	61, 64	2.0 - 4.0	Signal and Power/ Ground ball assignment is custom based on customer request.
	7.5	0.65	84, 89, 108	2.0 - 5.0
	8x7		100	2.5 - 6x5.1
	8	0.65	112	2.5 - 5.0
	10	0.65	161	4.0 - 7.0
	11	0.65	168, 192	4.5 - 8.0
	12	0.65	209	4.5 - 9.0
	13	0.65	225, 249	5.0 - 10.0
	14	0.65	257	5.5 - 11.0
	15	0.65	273	5.5 - 12.0
	16	0.65	303, 393, 405	5.5 - 12.0
	7	0.8	48	2.0 - 4.0
	8	0.8	73	2.0 - 6.0
	9	0.8	73, 80, 108	2.0 - 6.0
	10	0.8	113	2.0 - 7.0
	11	0.8	108, 109	2.5 - 8.0
	12	0.8	121, 144	3.0 - 9.0
	12	0.8	160	4.0 - 9.0
	12	0.8	180	4.5 - 9.0
	13	0.8	144, 160, 161	4.0 - 11.0
	13	0.8	180, 197	4.5 - 11.0
	13	0.8	212	5.0 - 10.0
	14	0.8	157	4.0 - 11.0
	14	0.8	192	5.0 - 11.0
	15	0.8	176	4.5 - 12.0
	15	0.8	208	5.0 - 12.0
	16	0.8	224	5.0 - 12.0
	16	0.8	240	5.5 - 12.0
	17	0.8	281	5.5 - 13.0
	19	0.8	240, 304	5.5 - 13.5
	22	0.8	389	7.0 - 13.5

Chip-Scale Package

A CSP is an integrated circuit BGA package with dimensions equal to or slightly larger than those of the silicon chip it contains, typically 1.2× the die size. A package with size (L × W) equal to the size of the chip is called a real-chip-size package.
(CSP trends)

System in Package

The SIP is a BGA package solution that accommodates multiple die in one package or multiple packages in one unit. This integration enables the design and assembly of a system in one package and results in system miniaturization, component cost and real estate savings, and reduced development lead time. The use of thin die creates a low-profile SIP package.

In terms of technology, mixed processes can be integrated into the SIP package. In terms of assembly, both wire bonding and flip-chip bonding technologies can be used in the SIP package. In fact within the SIP, various configurations of the multiple die or packages it contains are allowed. Configurations may consist of planar or stacked components. In the planar configuration, the die is mounted side by side on the same substrate, whereas in the stacked configuration the die is mounted one on top of the other.
(SIP trends)

NEC Electronics newest SIP techonology, SMAFTI incorporates stacked logic and gigabit class memory in a single package to enable high-speed, high-definition processing in mobile devices.