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Cell-Based ASIC Overview


Your high-volume projects demand the benefits of NEC's feature rich, high-density cell-based ASICs. With leading ASIC process technology and embedded DRAM, NEC provides the options you need for high performance system-level integration.


Product
family
Technology
node
Max.
available
gates
Max. I/Os Delay time
(F/O=2, 2-input NAND)
cb9090 nm100,000K280010.2 ps
cb-130130 nm52,000K300016.2ps
cb-12150 nm*32,000K270017.1 ps
cb-10vx0.25 µm19,519K201677 ps
cb-9vxvm0.35 µm 2,841K 1204155 ps


* 0.18 µm metal pitch, 0.13 µm transistor

 
 

Documentation


Please use our Tech Support Form if you wish to request copies of the ASIC documentation:
 
  Product Data Design Manuals
 
  Narrow Block Libraries
 
  Wide Block Libraries
 


 

Related Information


 
    Process Technologies Overview  
    Standard CMOS UX6  
    Standard CMOS UX5  
 
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